Search - altera nios

[Embeded-SCM Develop] Nios_IPphone

Description: 这是基于altera的片上处理器nios 的一个IP电话终端的设计,来源altera的电子设计文章大赛.
Platform: | Size: 190417 | Author: wokkoni | Hits:

[Other resource] NIOStoSOPC

Description: 本书主要介绍Altera公司的软核CPU——nios和采用该CPU进行嵌入式系统设计的流程与方法。并以此为着眼点，介绍Altera的片上可编程系统SOPC的设计原理与实践技术，引领读者在低投入的情况下，较快地进入片上系统soc的殿堂。
Platform: | Size: 8743307 | Author: 阿康 | Hits:

[Embeded-SCM Develop] SIN_fashengqi

Description: 2006altera大赛－基于软核Nios的宽谱正弦信号发生器设计：摘要：本设计运用了基于 Nios II 嵌入式处理器的 SOPC 技术。系统以 ALTERA公司的 Cyclone 系列 FPGA 为数字平台，将微处理器、总线、数字频率合成器、存储器和 I/O 接口等硬件设备集中在一片 FPGA 上，利用直接数字频率合成技术、数字调制技术实现所要求波形的产生，用 FPGA 中的 ROM 储存 DDS 所需的波形表，充分利用片上资源，提高了系统的精确度、稳定性和抗干扰性能。使用新的数字信号处理（DSP）技术，通过在 Nios 中软件编程解决不同的调制方式的实现和选择。系统频率实现 1Hz～20MHz 可调，步进达到了1Hz；完成了调幅、调频、二进制 PSK、二进制 ASK、二进制 FSK 调制和扫频输出的功能。 -2006altera race-based soft-core Nios wide spectrum of sinusoidal signal generator design : Abstract : The use of design-based Nios II embedded processor SOPC technology. Altera Corporation system to the Cyclone FPGA series of digital platform, microprocessor, bus, Digital Frequency Synthesizer, memory and I / O interface hardware concentrated in an FPGA, the use of direct digital frequency synthesis technology and digital modulation waveforms required to achieve the rise, Using FPGA ROM storage of the DDS waveform table, and make full use of on-chip resources, improve the system's accuracy, stability and robustness. Use of new digital signal processing (DSP) technology, Nios through software programming to solve different ways of achieving modulation and choice. Realize the system freq
Platform: | Size: 407706 | Author: 刘斐 | Hits:

[Embeded-SCM Develop] adda_spi

Description: 这个源码是用altera公司的开发工具NIOS II IDE开发的基于软核处理器的AD、DA控制程序，通过spi 核控制AD、DA的时序，实现正弦波发送和接收-this source is altera company development tools NIOS II IDE - based soft-core Office JIMMY of AD and DA control procedures, spi nuclear control AD and DA timetables to achieve sine sending and receiving
Platform: | Size: 67089 | Author: zeng xuan | Hits:

[Embeded-SCM Develop] buttonpio

Description: 此源码是利用altera公司的nios II IDE开发的，主要功能是利用中断实现按钮响应
Platform: | Size: 72096 | Author: zeng xuan | Hits:

[Embeded-SCM Develop] hello_world_0

Description: 此源码是用altera公司的nios II IDE开发的，基于DE2核心板的SD卡播放wav格式音频文件的程序
Platform: | Size: 144451 | Author: zeng xuan | Hits:

[Embeded-SCM Develop] ADDAButtonLED

Description: 此源码是利用altera公司的nios II IDE开发的源码，功能是在开发板上实现键盘控制的AD/DA发送接受正弦波、4×4小键盘按键通过串口显示、定时器控制led灯循环点亮的功能。
Platform: | Size: 160401 | Author: zeng xuan | Hits:

[Embeded-SCM Develop] sls_sram_16_bit

Description: altera NIOS软核系统中构建外接SRAM接口的例子-altera NIOS soft-core system to build external SRAM interface example
Platform: | Size: 4096 | Author: full-y | Hits:

[Embeded-SCM Develop] auto_baud_with_tracking

Description: ALTERA NIOS处理器实验，QUARTUS下用VHDL编译成处理器，自动band跟踪小程序-Altera NIOS processor experiments QUARTUS using VHDL compiler into processors, automatic tracking small band procedure
Platform: | Size: 8192 | Author: ofaro | Hits:

[Embeded-SCM Develop] bcd_to_binary

Description: ALTERA NIOS处理器实验，QUARTUS下用VHDL编译成处理器，bcd码转bin-Altera NIOS processor experiments QUARTUS using VHDL compiler into processor, code switch bin bcd
Platform: | Size: 2048 | Author: hecoun | Hits:

[Embeded-SCM Develop] binary_to_bcd

Description: ALTERA NIOS处理器实验，QUARTUS下用VHDL编译成处理器，bin转bcd-Altera NIOS processor experiments QUARTUS using VHDL compiler into processor, bin turn bcd
Platform: | Size: 2048 | Author: alsosho | Hits:

[Embeded-SCM Develop] CFI_FLASH

Description: Altera NIOS IICFI 驱动-cfi driver in NIOS II
Platform: | Size: 5120 | Author: ievance | Hits:

[VHDL-FPGA-Verilog] PSG

Description: Altera NIOS II 使用的 AY-3-8910 模組 . 包含 AY-3-8910 Verilog code, SOPC builder使用的hw_tcl及R-2R DAC 電路-AY-3-8910 module for Altera Nios II. verilog source code, hw_tcl file and R-2R DAC schematic.
Platform: | Size: 46080 | Author: charlie | Hits:

[SCM] I2c

Description: 单片机可用的I2C接口代码，已在altera Nios II验证通过-I2C interface code, has been verified in the NiosII Altera
Platform: | Size: 6144 | Author: liven | Hits:

[Other] NIOS-Development-Suite

Description: 这是针对altera 公司芯片的SOPC 程序，对于初学者和工程移置都有重要价值。-This is program suite for altera company. The sopc program is very useful to EDA leaners and engineer.
Platform: | Size: 25426944 | Author: 罗森林 | Hits:

[Embeded-SCM Develop] niosii-triple-speed-ethernet-4sgx230-qsys-141

Description: 利用nios在altera的cyclone4sgx平台上实现一个三态以太网控制器(Implementation of a three state Ethernet controller using Nios)
Platform: | Size: 1133568 | Author: Swaggy | Hits:

[VHDL-FPGA-Verilog] niosii-triple-speed-ethernet-4sgx230-qsys-131

Description: Altera公司出的三速以太网例程，工程编译完了可以用niosii直接生成simple_socket_server，希望有用。(Altera company out of the three speed Ethernet routines, engineering finished, you can directly generate simple_socket_server using NiosII, I hope useful.)
Platform: | Size: 1160192 | Author: xxswwq | Hits:

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